Technical Document
Specifications
Brand
Texas InstrumentsMounting Type
Surface Mount
Package Type
TSSOP
Pin Count
16
Dimensions
5 x 4.4 x 1.15mm
Maximum Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+85 °C
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Decoders/Multiplexers, Texas Instruments
Texas Instruments range of Decoders, Multiplexers and De-multiplexers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
€ 2.42
€ 0.242 Each (In a Pack of 10) (Exc. Vat)
€ 2.93
€ 0.293 Each (In a Pack of 10) (inc. VAT)
Standard
10
€ 2.42
€ 0.242 Each (In a Pack of 10) (Exc. Vat)
€ 2.93
€ 0.293 Each (In a Pack of 10) (inc. VAT)
Standard
10
Stock information temporarily unavailable.
Please check again later.
Quantity | Unit price | Per Pack |
---|---|---|
10 - 40 | € 0.242 | € 2.42 |
50 - 190 | € 0.203 | € 2.03 |
200 - 490 | € 0.182 | € 1.82 |
500+ | € 0.157 | € 1.57 |
Technical Document
Specifications
Brand
Texas InstrumentsMounting Type
Surface Mount
Package Type
TSSOP
Pin Count
16
Dimensions
5 x 4.4 x 1.15mm
Maximum Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+85 °C
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Decoders/Multiplexers, Texas Instruments
Texas Instruments range of Decoders, Multiplexers and De-multiplexers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22