Technical Documents
Specifications
Brand
onsemiProduct Type
Multiplexer
Logic Family
CMOS
Pin Count
14
Number of Elements per Chip
4
Output Type
CMOS
Mount Type
Surface
Configuration
Quad
Minimum Supply Voltage
3V
Package Type
SOIC
Maximum Supply Voltage
18V
Maximum On State Resistance
840Ω
Multiplexer/Demultiplexer
Multiplexer
Minimum Operating Temperature
-55°C
Maximum Operating Temperature
125°C
Standards/Approvals
RoHS
Length
8.75mm
Height
1.5mm
Automotive Standard
AEC-Q100
Product Details
The MC14016B quad bilateral switch is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each MC14016B consists of four independent switches capable of controlling either digital or analog signals. The quad bilateral switch is used in signal gating, chopper, modulator, demodulator and CMOS logic implementation.
Stock information temporarily unavailable.
€ 8.60
€ 0.344 Each (Supplied in a Tube) (Exc. Vat)
€ 10.41
€ 0.416 Each (Supplied in a Tube) (inc. VAT)
Production pack (Tube)
25
€ 8.60
€ 0.344 Each (Supplied in a Tube) (Exc. Vat)
€ 10.41
€ 0.416 Each (Supplied in a Tube) (inc. VAT)
Stock information temporarily unavailable.
Production pack (Tube)
25
Technical Documents
Specifications
Brand
onsemiProduct Type
Multiplexer
Logic Family
CMOS
Pin Count
14
Number of Elements per Chip
4
Output Type
CMOS
Mount Type
Surface
Configuration
Quad
Minimum Supply Voltage
3V
Package Type
SOIC
Maximum Supply Voltage
18V
Maximum On State Resistance
840Ω
Multiplexer/Demultiplexer
Multiplexer
Minimum Operating Temperature
-55°C
Maximum Operating Temperature
125°C
Standards/Approvals
RoHS
Length
8.75mm
Height
1.5mm
Automotive Standard
AEC-Q100
Product Details
The MC14016B quad bilateral switch is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each MC14016B consists of four independent switches capable of controlling either digital or analog signals. The quad bilateral switch is used in signal gating, chopper, modulator, demodulator and CMOS logic implementation.