bez PVN
ar PVN
Tehniskie Dokumenti
Specifikācija
Brand
Renesas ElectronicsProduct Type
Logic Level Translator
Logic Family
LVCMOS/LVTTL
Mount Type
Surface
Package Type
SOIC
Number of Elements per Chip
1
Pin Count
8
Output Type
LVCMOS/LVTTL
Logic Function
CMOS
Minimum Supply Voltage
2.5V
Maximum Supply Voltage
3.3V
Translation
SOIC
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Standards/Approvals
RoHS
Automotive Standard
No
Produkta Apraksts
The Renesas Electronics 1-to-1 differential-to- LVCMOS/ LVTTL translator and a member of the family of high performance clock solutions from IDT. The differential input is highly flexible and can accept the following input types that is LVPECL, LVDS, LVHSTL, SSTL and HCSL. The small 8-lead SOIC footprint makes this device Ideal for use in applications with limited board space.
Noliktavas stāvoklis patreiz nav pieejams
€ 7,40
€ 7,40 Katrs (bez PVN)
€ 8,95
€ 8,95 Katrs (Ieskaitot PVN)
Standarts
1
€ 7,40
€ 7,40 Katrs (bez PVN)
€ 8,95
€ 8,95 Katrs (Ieskaitot PVN)
Noliktavas stāvoklis patreiz nav pieejams
Standarts
1
| Daudzums | Vienības cena |
|---|---|
| 1 - 9 | € 7,40 |
| 10 - 24 | € 6,70 |
| 25 - 49 | € 6,40 |
| 50 - 96 | € 6,30 |
| 97+ | € 5,60 |
Tehniskie Dokumenti
Specifikācija
Brand
Renesas ElectronicsProduct Type
Logic Level Translator
Logic Family
LVCMOS/LVTTL
Mount Type
Surface
Package Type
SOIC
Number of Elements per Chip
1
Pin Count
8
Output Type
LVCMOS/LVTTL
Logic Function
CMOS
Minimum Supply Voltage
2.5V
Maximum Supply Voltage
3.3V
Translation
SOIC
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Standards/Approvals
RoHS
Automotive Standard
No
Produkta Apraksts
The Renesas Electronics 1-to-1 differential-to- LVCMOS/ LVTTL translator and a member of the family of high performance clock solutions from IDT. The differential input is highly flexible and can accept the following input types that is LVPECL, LVDS, LVHSTL, SSTL and HCSL. The small 8-lead SOIC footprint makes this device Ideal for use in applications with limited board space.