Tehniskie dokumenti
Specifikācija
Brand
NexperiaLogic Family
HC
Logic Function
JK Type
Input Type
Single Ended
Output Signal Type
Differential
Triggering Type
Negative Edge
Polarity
Inverting, Non-Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Set/Reset
Reset
Number of Elements per Chip
2
Maximum Propagation Delay Time @ Maximum CL
160 ns @ 2 V
Dimensions
8.75 x 4 x 1.45mm
Maximum Operating Supply Voltage
6 V
Height
1.45mm
Width
4mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
2 V
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
8.75mm
Izcelsmes valsts
Thailand
Produkta apraksts
74HC Family Flip-Flops & Latches, Nexperia
A range of NXP Flip-Flops and Latches from the 74HC Family of CMOS Logic ICs. The 74HC Family use silicon gate CMOS technology to achieve operating speeds similar to the LSTTL family but with the low power consumption of standard CMOS integrated circuits.
74HC Family
Noliktavas stāvoklis patreiz nav pieejams
Lūdzu pārbaudiet vēlreiz vēlāk
€ 0,185
Katrs (Tubina ir 57) (bez PVN)
€ 0,224
Katrs (Tubina ir 57) (Ieskaitot PVN)
57
€ 0,185
Katrs (Tubina ir 57) (bez PVN)
€ 0,224
Katrs (Tubina ir 57) (Ieskaitot PVN)
57
Tehniskie dokumenti
Specifikācija
Brand
NexperiaLogic Family
HC
Logic Function
JK Type
Input Type
Single Ended
Output Signal Type
Differential
Triggering Type
Negative Edge
Polarity
Inverting, Non-Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Set/Reset
Reset
Number of Elements per Chip
2
Maximum Propagation Delay Time @ Maximum CL
160 ns @ 2 V
Dimensions
8.75 x 4 x 1.45mm
Maximum Operating Supply Voltage
6 V
Height
1.45mm
Width
4mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
2 V
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
8.75mm
Izcelsmes valsts
Thailand
Produkta apraksts
74HC Family Flip-Flops & Latches, Nexperia
A range of NXP Flip-Flops and Latches from the 74HC Family of CMOS Logic ICs. The 74HC Family use silicon gate CMOS technology to achieve operating speeds similar to the LSTTL family but with the low power consumption of standard CMOS integrated circuits.