Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
4 ns @ 5 V, 4.5 ns @ 3.3 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Maximum Operating Temperature
+85 °C
Length
2mm
Width
1.25mm
Minimum Operating Temperature
-40 °C
Height
0.9mm
Dimensions
2 x 1.25 x 0.9mm
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
€ 3.86
€ 0.771 Each (In a Pack of 5) (Exc. Vat)
€ 4.67
€ 0.933 Each (In a Pack of 5) (inc. VAT)
Standard
5
€ 3.86
€ 0.771 Each (In a Pack of 5) (Exc. Vat)
€ 4.67
€ 0.933 Each (In a Pack of 5) (inc. VAT)
Standard
5
Stock information temporarily unavailable.
Please check again later.
Quantity | Unit price | Per Pack |
---|---|---|
5 - 20 | € 0.771 | € 3.86 |
25 - 45 | € 0.632 | € 3.16 |
50 - 95 | € 0.576 | € 2.88 |
100 - 245 | € 0.542 | € 2.71 |
250+ | € 0.504 | € 2.52 |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
4 ns @ 5 V, 4.5 ns @ 3.3 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Maximum Operating Temperature
+85 °C
Length
2mm
Width
1.25mm
Minimum Operating Temperature
-40 °C
Height
0.9mm
Dimensions
2 x 1.25 x 0.9mm
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22